Hardware, from the board to the chip
Follow a concrete artifact through its components, documentation, and behavior. This is a learning path, not a single historical chronology.
Reviewed: 2026-10-16

A badge as an inspectable system
Joe Grand’s DEF CON 14 badge from 2006 combines a PIC10F202, LEDs, and a button with published design documentation. Microchip classifies the PIC10F202 as a microcontroller. The example ties a visible behavior to a small programmable device, its circuit, and its documentation. The project materials stay at their source; no source code is executed by this archive.
Sources:
Badge project: https://grandideastudio.com/portfolio/other/defcon-14-badge/
Manufacturer device page: https://www.microchip.com/en-us/product/PIC10F202

CPU, MCU, and FPGA are different roles
A CPU executes instructions. A microcontroller integrates a CPU with memory and peripherals suited to controlling a device. An FPGA provides configurable digital logic and can also contain or implement a CPU design. Novena’s combination of a processor, FPGA, and memory is a concrete example of these roles complementing one another rather than being interchangeable labels.
Sources:
Novena design account: https://www.bunniestudios.com/blog/2013/update-on-our-laptop-aka-novena/
PIC datasheet: https://ww1.microchip.com/downloads/en/devicedoc/40001239F.pdf

Interfaces and the limits of labels
JTAGulator is a research instrument for identifying interfaces on hardware. JTAG and SWD are associated with debugging; UART is a serial communications interface and is not inherently a debugger. A board connector does not by itself reveal what access is authorized or what the device does. Good historical documentation preserves the schematic, device identity, version, and observed behavior.
Sources:
JTAGulator project: https://grandideastudio.com/portfolio/security/jtagulator/

Inside the chip
Huang’s Baochip discussion connects silicon imagery and source-level understanding of memory structures. It extends the scale of inquiry from a whole board to the organization inside a chip. This archive links the creator’s images without copying them. A useful educational sequence is board → schematic → datasheet → firmware behavior → interfaces → architecture → repair or redesign, with findings recorded at each step.
Sources:
Baochip analysis: https://www.bunniestudios.com/blog/2026/name-that-ware-april-2026/